EHLS high level analog layer

The High Level Simultaneously Sampled (High Level SS) layer is a high performance layer that supports multiple adapter modules to extend the range of supported transducers. The layer supports powered inputs with configurable full scale ranges from +/-64 mV up to +/-74.9 V. This board conditions each of the 16 input signals by means of programmable excitation circuitry, an eight (8) pole Butterworth analog guard filter, programmable amplifier gain and offset, 16-bit analog to digital converter sampling at 100000 S/s in the Decimal sample rate domain (or 98304 S/s in the Binary domain). The EHLS features simultaneous sampling for all 16 channels, programmable digital filters, and the output sample rate achieved by means of multiple stages of combined down sampling / digital filtering. Some other features are itemized as follows.

  1. Differential inputs provided for the analog input signals.
  2. Synchronous sampling with other EHLS, EBRG and EDIO layers.
  3. 400 mW of transducer power supply with adjustable supply voltage for every channel (3 to 28 V). Power supplies can used in parallel for larger loads.
  4. Isolated analog output signal for each channel.
  5. Completely flexible configuration of filter type, filter pass bandwidth, and sample rate on a per channel basis.
  6. IEPE adapter module and Smart modules that support resistive bridge and thermocouple sensors.

Connect transducers to the EHLS individually using the M8 connectors located on the front panel.

Each independent channel contains programmable transducer power, an eight-pole Butterworth analog guard filter, a 16-bit A/D converter, software selectable digital filtering and output sample rate options of up to 100 kHz. The EHLS also provides 400 milliwatts of transducer power supply with an adjustable supply voltage of 3-28 volts for every channel. Use the transducer power supplies in parallel for larger loads.

NOTE
The analog guard filters on the EHLS channels result in some gain amplification for high frequency inputs.

Wiring diagrams

EHLS Analog input

Use the Somat SAC-TRAN-MP Transducer Cable (1-SAC-TRAN-MP-2-2 or 1-SAC-TRAN-MP-10-2) to wire EHLS analog inputs.

NOTE
Do not use this wiring diagram for EBRG channels.

Current-fed piezoelectric transducer (IEPE) input with adapter

Strain gages

Analog Output

The EHLS is available with an optional analog output function to provide high level analog output signal for each channel. Outputs are filtered analog output signals that can be used in the creation of time-domain lab durability tests. Each output channel is associated with the corresponding (like-numbered) input channel on the EHLS board. Connect the analog outputs to the EHLS through the Analog Output connector on the back panel shown in the diagram below.

This diagram shows the analog out connector on the back panel of an EHLS layer.

The outputs are generated from a D/A converter implemented as a unity gain follower to the A/D converter. The EHLS uses the non-inverting unity gain follower by default. Select the Analog output inversion option in the test setup configuration to use the inverting unity gain follower when the channel calibration slope is negative.

NOTE
The EHLS uses a nominal ±2-volt A/D converter. However, do not assume that the user-defined full-scale values are even approximately equivalent to ±2 volts for any particular channel. This is primarily because the eDAQXR automatically provides a minimum over range protection of 1% and the eDAQXR can set gains only at certain discrete values resulting in actual over range protection that is sometimes significantly larger than 1%.